Hytec Electronics Ltd. |
UIO 2010 Universal I/O Module Product Description The UIO 2010 is a 64 channel Universal I/O VMEbus module. The board contains five FPGAs which are interconnected to allow data routing from the VMEbus to the front panel connectors. One FPGA forms the VMEbus interface. The other four each route 16 I/Os to the front panel and have a 32-bit data bath to the VME data buffers. The master FPGA communicates with the slaves via 16 control lines (of which three are used for the buffered lemo inputs) Specification Power Requirements Front Panel Connectors A &B - 68-way mini delta Architecture The circuitry includes five Xilinx FPGAs: the first decodes and controls VME access, the other four each contain 16 I/Os. Six jumpers set the base address of the unit and an additional two jumpers the FPGA number. Thus if the BA is set to 0xF000 and the FPGAs 0-3 ther addresses are 0xF000, 0xF100, 0xF200, 0xF300. Each slave FPGA then has the following registers
ID The ID registers contains the Hytec identifier. Model Type This register contains the model type number - 2010 Overflow Register This register provides the overflow status of each scaler with bit 0 corresponding to scaler 0, bit 1 scaler 1 etc. The register can be cleared by writing a logic 1 to bit 8 of the CSR CSR
Address Modifiers
Operating Temperature Range 0 to +45 deg Celsius ambient. Mechanical 6U single width VME module with access to P1 and P2 connectors. |
Hytec Electronics Ltd Post : 5 Cradock Road, Reading, Berkshire, RG2 0JT, England. Phone : +44 (0)118 9757770 Fax : +44 (0)118 9757566 |