Product Description

This single–width module contains a 24 bit input register and a 24 bit output register, with a further optional 8 bit settable outputs available on the 440 version only. A ’ Data Present’ input signal is used to set a read LAM to indicate that new input data is available to read. A ’ Data Accepted’ pulse or level is output after a time delay to indicate that the data has been read. The output register has 24 parallel open collector outputs which may be controlled from the dataway. A ’ Data Required’ signal may be used to set a Write LAM to indicate that new data is required. A ’Data Present’ pulse or level is generated after a delay to show that data is present.

Features

• Two versions available 400 basic and 440 with 8 extra bit settable outputs.
• 24 Schmitt trigger inputs.
• Optional R–C input integration.
• Single link allows input logic inversion.
• Inputs protected to +8v and –3v.
• 24 Open collector outputs.
• All outputs can sink 150mA at 0.35v.
• All outputs can withstand +70v ’off’ state.
• All outputs can withstand 350mA.
• Controlled power down of outputs.
• Output pulses true or inverted.
• 25 (–3 version) or 37 way (–6 version) D Type front panel sockets. Extra 8 bits on 440 version uses rear panel 9 way D Type.

Power Requirements

+6 Volts at 1.45 Amps with no pull–ups.

Temperature

0 deg C to 45 deg C.
Forced air cooling is advised for operation above 30 deg C.